1. Technical Field
The present invention relates to a printed circuit board and a method of manufacturing the same.
2. Description of the Related Art
Recently, a demand for a pitch of 10 μm/10 μm or less has been increased in a board for a package, such as a flip chip ball grid array (FCBGA) of a printed circuit board. As a result, in addition to a modified semi-additive process (MSAP), many methods have been developed. A fine circuit may be implemented in a product, such as the FCBGA of 5 μm/5 μm or less and an interposer of 3 μm/3 μm or less. In implementing the fine circuit, consequently, a method of plating the seed layer needs to etch the seed layer without debris. In this case, the seed layer may be formed to have a surface without debris by over etching the seed layer to be larger than a thickness of the seed layer but the change in a circuit line width may occur. The change in a circuit line width causes a deformation of a board, and thus an exposure resolution higher than a desired line width in the actual process is required. Further, due to a problem of an undercut, a circuit having 3 μm/3 μm may be implemented by restricting the change in the circuit line width to a ratio of a higher unbalance. The influence of the undercut becomes more problematic in the fine circuit. In severe case, since the undercut is progressed to a depth of several μm to cause a delamination phenomenon of a circuit line (RDL), it is very difficult to implement the fine circuit. In addition, since a future fine circuit related technology requires a new line width structure having a higher aspect ratio than the present, a technology of making a dimension constant by protecting a side of the circuit line and a technology of preventing the undercut are necessarily required for products, such as a flip chip ball grid array, a flexible printed circuit (FPC) having a driving drive, and an interposer serving to correct a difference between line widths of a chip die and the board.
Meanwhile, Patent Document 1 discloses a method of manufacturing a printed circuit board which prevents a circuit pattern from etching at the time of flash etching, but has a problem in that an effect of protecting the line width of the circuit pattern and suppressing the undercut may not be sufficiently implemented.    Patent Document 1: Korean Patent Laid-Open Publication No. 2010-0029561
Therefore, the present invention is completed by forming etched grooves at both sides of the seed layer of the circuit pattern of the printed circuit board so as to protect a line width of the circuit pattern and suppress an undercut.